wlroots/backend/drm
Simon Ser 5ea02f900c backend/drm: force linear layout for multi-GPU buffers
Some buffers need to be copied across GPUs. Such buffers need to be
allocated with a format and modifier suitable for both the source
and the destination.

When explicit modifiers aren't supported, we were forcing the buffers
to be allocated with a linear layout, because implicit modifiers
aren't portable across GPUs. All is well with this case.

When explicit modifiers are supported, we were advertising the whole
list of destination modifiers, in the hope that the source might
have some in common and might be able to allocate a buffer with a
more optimized layout. This works well if the source supports explicit
modifiers. However, if the source doesn't, then wlr_drm_format_intersect
will fallback to implicit modifiers, and everything goes boom: the
source uses a GPU-specific tiling and the destination interprets it
as linear.

To avoid this, just force linear unconditionally. We'll be able to
revert this once we have a good way to indicate that an implicit modifier
isn't supported in wlr_drm_format_set, see [1].

[1]: https://github.com/swaywm/wlroots/pull/2815

Closes: https://github.com/swaywm/wlroots/issues/3030
(cherry picked from commit d71ed635b9)
2021-07-08 17:16:42 +02:00
..
atomic.c backend/drm: remove wlr_drm_crtc_state.mode 2021-04-29 19:51:57 +02:00
backend.c backend/drm: force linear layout for multi-GPU buffers 2021-07-08 17:16:42 +02:00
cvt.c backend/drm: add support for custom modes 2019-10-27 10:46:47 -04:00
drm.c backend/drm: don't clear pending cursor FB on failed commit 2021-07-07 19:24:47 +02:00
legacy.c backend/drm: remove wlr_drm_crtc_state.mode 2021-04-29 19:51:57 +02:00
meson.build meson: Various improvements 2019-12-23 07:48:29 -05:00
properties.c backend/drm: add support for the subconnector property 2021-01-17 12:42:25 +01:00
renderer.c render: drop wlr_ prefix from wlr_renderer_bind_buffer 2021-06-09 10:26:09 +02:00
util.c Revert "backend/drm: fail instead of stripping a modifier" 2021-04-27 15:38:10 +02:00